Crossbar ReRAM: Rethinking Simplicity.
Resistive random-access memory (ReRAM) is based on a simple three-layer structure of top electrode, switching medium and bottom electrode (FIGURE 1). The resistance switching mechanism is based on the formation of a filament in the switching material when a voltage is applied between the two electrodes. There are different approaches to implementing ReRAM, based on different switching materials and memory cell organization. Those variables drive significant performance differences depending upon the switching materials being used.
Crossbar’s technology will deliver 1,000x faster write performance;
20x lower power consumption; and 1,000x the endurance at half the die size.
Crossbar ReRAM technology can be stacked in 3D, delivering multiple terabytes of storage on a single chip. Its simplicity, stackability and CMOS compatibility enable logic and memory to be integrated onto a single chip at the latest technology node (FIGURE 2).
Crossbar’s patented built-in selector allows various memory array configurations in which a single transistor can drive one or thousands of memory cells. This enables Crossbar cells to be organized in super dense 3D cross-point arrays, stackable with the capability to scale below 10nm, paving the way for terabytes on a single die.
The approach is also CMOS compatible. Designers can put logic, controllers and microprocessors next to memory in the same die, simplifying packaging and increasing performance. ReRAM’s simple structure and CMOS compatibility enable any foundry – CMOS or logic – to enter the ReRAM business by licensing Crossbar ReRAM technology for Systems-on-Chip (SoC) or standalone memory devices.
Read the “Crossbar ReRAM Technology” white paper to learn more: