Resistive random-access memory (ReRAM) is widely hailed as the most promising technology in the race to develop new, more scalable, high capacity, high performance and reliable storage solutions.
A typical ReRAM cell has a switching material with different resistance characteristics sandwiched by two metallic electrodes. The switching effect of ReRAM is based on the motion of ions under the influence of an electric field or heat and the switching material’s ability to store the ion distribution, which in turn causes a measurable change of the device resistance.
There are different approaches to implementing ReRAM, based on different switching materials and memory cell organization. Those variables drive significant performance differences among the different materials being used. The most common challenges for ReRAM technology are temperature sensitivity, integration with standard CMOS technology and manufacturing process and the select mechanism of individual ReRAM cells.
ReRAM has already been the subject of intense research and development, with several companies claiming to have prototype memory chips available in the next 1-2 years.
Crossbar ReRAM technology is based on non-conductive amorphous silicon (a-Si) as the host material for a metallic filament formation. The switching mechanism is based on an electric field making Crossbar ReRAM cell behavior very stable across a wide temperature range.
The simple structure of Crossbar ReRAM cell, its commonly used materials, process steps and manufacturing tools enable any semiconductor foundries to enter the memory business by licensing Crossbar ReRAM technology and produce storage class memory chips.
The performance and bits/area density of ReRAM memories depend on the way memory cells are interconnected. Embedded low latency high speed memory operations can be achieved by controlling individually each memory cell with a transistor. In this 1T1R (1 Transistor per 1 ReRAM cell) array organization, the overall memory size is then dominated by the transistor size. High density storage class memories need a much denser memory array organization to be cost-effective that require the ability to connect thousands of memory cells with one unique transistor. This 1TnR organization is possible only if the ReRAM cell has some built-in select mechanism that can individually select or not specific ReRAM cells.
Compared to traditional NAND Flash memory, Crossbar ReRAM is much faster, bit-alterable and requires lower voltage, enabling its use in both embedded and SSD applications. The versatility of Crossbar’s ReRAM technology permits very low latency memory access when memory cells are connected in a 1T1R array or best area efficiency (4F2 cell) in a cross-point 1TnR array thanks to Crossbar’s patented built-in select feature.
Crossbar ReRAM technology has proven its manufacturability with a working array produced in a commercial fab. This working silicon is a fully integrated monolithic CMOS controller and memory array chip. The company is currently completing the characterization and optimization of this device and plans to bring its first product to market in the embedded SoC market while continuing the development of high-density storage class memory arrays in advanced process geometries.
- ReRAM Overview
- ReRAM Advantages
- ReRAM: The Future Technology for NAND Flash
- Sneak Path Breakthrough
- Overcoming Challenges in 3D Memory Production
- High Capacity, High-Performance Non-Volatile Memory