Crossbar Inc.是一家富有朝气的初创企业,我们的解决方案将极大地推动全球存储行业。在高层投资者的支持下,我们汇聚了来自金融,市场营销,法务和工程领域领先的专家团队。我们始终致力于实现愿景,推动整个行业内容存储和交付机制的转换。

如下职位正虚位以待:

Director - Device Engineering

Location

  • Full time position in Santa Clara, CA

Job Description

As a Director of Device Engineering at Crossbar, Inc., your responsibilities include, but are not limited to the following:

  • Provide leadership and training to the resistive memory (ReRAM) device engineering team.
  • Provide device analysis reports to process development and manufacturing teams.
  • Recommend device performance and reliability improvements to process manufacturing teams.
  • Generate electrical design rules and assist manufacturing teams in developing the technology design rules.
  • Lead the development of device operation algorithms.
  • Lead the development of devices models including SPICE models.
  • Establish thorough ReRAM array characterization protocols and provide feedback for the yield improvement.
  • Work with manufacturing foundry partners and provide guidance on all device engineering related deliverables.

Education Requirements/Preference

  • 6+ years of experience in managing and leading device engineering team.
  • 10+ years of direct device engineering experience.
  • Minimum required education MS in EE or Physics. PHD in EE or Physics is preferred.
  • Solid understanding on the advanced semiconductor process is preferred.
  • Experience in the area of product engineering is a plus
  • Successful track record in related technology development projects.
  • Experience in ReRAM devices is highly preferred.
  • Team builder, and good written and verbal communication skills.

Embedded Memory Designer Lead

Location

  • Full time position in Santa Clara, CA

Job Description

As an Embedded Memory Designer Lead at Crossbar, Inc., your responsibilities include, but are not limited to the following:

  • Work with customers and business unit to define/refine embedded NV memory cores for use in SoC/MCU products.
  • Create behavioral, timing and testability models representing the embedded cores at various levels of abstraction for simulations during the SoC/MCU design process.
  • Lead customization effort to take existing macro designs and modify them to customer requirements (density, organization, external voltage/current requirements, etc.).
  • Make architecture changes and run validation as needed.
  • Design/modify and simulate critical circuits – Sensing, read path, write path.
  • Prepare, document and present design reviews during the design/customization development phase.
  • Work with characterization engineers to validate and characterize the design on the silicon.
  • Work with yield enhancement, manufacturing, and technology development teams to debug and resolve issues related to the product design, or manufacturing yield.
  • Work with test engineering to review test flows and recommend optimum testing conditions.
  • Work with reliability engineers and assist them during failure analysis.

Education Requirements/Preference

  • BSEE (MSEE preferred) with at least 10 years of experience in semiconductor memory design.
  • Experience with memory circuit design techniques, read path, sensing.
  • Experience in nonvolatile memory design.
  • Experience in architecting the design for optimum performance and area.
  • Experience in floor planning.
  • Experience in creating behavioral, timing and testing models for embedded memory cores.
  • Solid understanding of design/circuit engineering, and good knowledge in device physics.
  • Hands-on experience with design/simulation/verification/CAD tools.
  • Experience with silicon characterization and lab equipment.
  • Experience with supervising and mentoring other junior engineers.

Senior Test Engineer (for PE Group)

Location

  • Full time position in Santa Clara, CA

Job Description

As a Sr. Test Engineer at Crossbar, Inc., your responsibilities include, but are not limited to the following:

  • Electrical characterization of non-volatile memory (NVM) devices.
  • Provide device analysis reports to process development/manufacturing teams.
  • Development and optimization of NVM operation algorithms.
  • Physical device modeling and simulation.
  • Failure analysis.
  • Generate electrical design rules and assist manufacturing teams in developing the technology design rules.

Education Requirements/Preference

  • M.S. or Ph.D. in EE, Physics or related field.
  • 3+ years of direct NVM device engineering experience.
  • Intensive experience in device modeling and simulation.
  • Strong in-depth understanding of solid-state physics and/or material science.
  • Experience in RRAM devices is highly preferred.
  • Familiarity with programing language(s) (e.g. C/C++) is plus.
  • Excellent written and verbal communication skills.
  • Must be a hard working, self-motivated and strong team player.

Senior Design Engineer

Location

  • Full time position in Santa Clara, CA

Job Description

As a Senior Design Engineer at Crossbar, Inc., your responsibilities include, but are not limited to the following:

  • Architect advanced memory products.
  • Design advanced nonvolatile memory circuits for memory product.
  • Simulate critical circuits – Sensing, read path, write path.
  • Work with device engineering on optimizing the memory cell requirements given product specifications.
  • Work with product planning on optimizing the product specification.
  • Prepare, document, and present design reviews during the design development phase.
  • Work with characterization engineers to validate and characterize the design on the silicon.
  • Work with yield enhancement, manufacturing, and technology development teams to debug and resolve issues related to the product design, or manufacturing yield.
  • Work with test engineering to review test flows and recommend optimum testing conditions.
  • Work with reliability engineers and assist them during failure analysis.

Education Requirements/Preference

  • MSEE with at least 8+ years of experience in design engineering.
  • Experience with memory circuit design techniques, read path, sensing.
  • Experience in nonvolatile memory design is a must.
  • Experience in architecting the design for optimum performance and die size.
  • Experience in floor planning is a plus.
  • Solid understanding of design/circuit engineering, and good knowledge in device physics.
  • Hands-on experience with design/simulation/verification/CAD tools.
  • Experience with silicon characterization and lab equipment.
  • Experience with supervising and mentoring other junior engineers.

Device Engineer (Sr. Engineer or Staff Engineer Level)

Location

  • Full time position in Santa Clara, CA

Job Description

As a Device Engineer at Crossbar, Inc., your responsibilities include, but are not limited to the following:

  • Electrical characterization of non-volatile memory (NVM) devices.
  • Provide device analysis reports to process development/manufacturing teams.
  • Development and optimization of NVM operation algorithms.
  • Physical device modeling and simulation.
  • Failure analysis.
  • Generate electrical design rules and assist manufacturing teams in developing the technology design rules.

Education Requirements/Preference

  • M.S. or Ph.D. in EE, Physics or related field.
  • 3+ years of direct NVM device engineering experience.
  • Intensive experience in device modeling and simulation.
  • Strong in-depth understanding of solid-state physics and/or material science.
  • Experience in RRAM devices is highly preferred.
  • Familiarity with programing language(s) (e.g. C/C++) is plus.
  • Excellent written and verbal communication skills.
  • Must be a hard working, self-motivated and strong team player.

Application Engineer

Location

  • Full time position in Santa Clara, CA

Job Description

As an Application Engineer at Crossbar, Inc., your responsibilities will include, but are not limited to the following:

  • Support customers on initial design-ins, product demos, and qualifications.
  • Create and maintain product support documentation such as app notes and errata, etc.
  • Validate ReRAM product functionality and reliability requirement as listed in customer datasheet using system platform and ATE test equipment.
  • Develop and code algorithms and use cases for memory characterization.
  • Drive product characterization with different use cases.
  • Coordinate with Design Engineering on product features and design specification.
  • Collaborate with System Engineering on system platform and customer demo features.
  • Work with Test Engineering on customer’s embedded memory test requirement and implementation.

Education Requirements/Preference

  • BSEE or MSEE with 3+ years of related industry experience.
  • Experience with non-volatile memory such as RRAMs and/or FLASH is required.
  • Proficient in Python and/or Perl scripting; Experienced with Visual Basic and/or C/C++.
  • Knowledgeable in semiconductor device physics, CMOS process and circuit design.
  • Must have experience with application, design, product, test, or system engineering.
  • Experience with ATE platforms and bench test equipment.
  • Working knowledge of silicon debug and CMOS reliability test.
  • Self-motivated, teamwork-oriented, and strong organization skills.
  • Strong communication skills; Mandarin Chinese is a plus.
  • Must be willing to travel internationally.

Product Engineer

Location

  • Full time position in Santa Clara, CA

Job Description

As a Product Engineer at Crossbar, Inc., your responsibilities will include, but are not limited to the following:

  • New Silicon/Product Validation and Characterization reporting.
  • Qualification of new Silicon/Products and Processes.
  • Report and Improve Product Yields at both wafer sort and package test.
  • Reviewing test coverage/programs to ensure 100% compliance to a data sheet.
  • Assist with the debug of new product/Si design and/or process defects.

Education Requirements/Preference

  • This position requires a Bachelor’s degree (in EE; BSEE) with a minimum 3+ years of related industry experience.
  • Experience with non-volatile memory such as RRAMs and/or FLASH is a required.
  • Have working knowledge/experience with Perl and/or Python (or similar scripting languages) is required; C/C++, JMP, and/or Matlab experience is a plus but not required.
  • Experience with using ATE platforms; experience with using Teradyne Magnum-I/II systems is a plus, but not required.
  • Working knowledge of semiconductor CMOS process steps and defect mechanisms.
  • Must be self-motivated individually capable of executing detailed instructions given by management and/or the technical staff.
  • Must be able to work well individually or as a member of a cross-functional team.

Program Manager

Location

  • Full time position in Santa Clara, CA

Job Description

As a Program Manager at Crossbar, Inc., your responsibilities include, but are not limited to, the following:

  • Prepare overall program plan, and coordinate the implementation.
  • Maintain schedule of all ongoing projects using Critical Path methodology, and manage the impact of various causes for the change of the delivery dates.
  • Organize and facilitate program team meetings and milestone reviews and facilitate decision making regarding the program.
  • Documenting all project events and milestones.
  • Understand and assess program risks. Develop timely mitigation plans to maximize roadmap delivery.
  • Identify and evaluate all resources needed for the project.
  • Help to create and manage a well-defined company-wide process and implement best practices in the program management. Identify processes and procedures for improvement.

Education Requirements/Preference

This position requires a Bachelor or Master degree with 3-5 years of experience in a Program Manager role.

  • Strong knowledge of semiconductor product development and manufacturing and is a must.
  • Experienced in using MS Project and Critical Path methodology.
  • Strong background in organizational development.
  • A proven track record of successfully implementing complex projects in a technology development environment with multiple engineering teams.
  • Excellent communication skills, ability to collect information and communicate clearly.
  • Versed in Program Management best practices: team building, role / responsibility definition, risk management, work breakdown structures, project tracking, conflict management, efficient meeting management etc.
  • Comfortable in rapid development cycles with aggressive goals. Able to keep cool head in tough situations.
  • Ability to influence and motivate others.

Technical Marketing

Location

  • Full time position in Santa Clara, CA

Job Description

As a Technical Marketing at Crossbar, Inc., your responsibilities include, but are not limited to the following:

  • Analyze market segments and trends (data centers, mobile, industrial / automotive / medical, consumer electronics, IoT, artificial intelligence).
  • Analyze memory market and competitive positioning vs other memory technologies (Flash, DRAM, RRAM, MRAM, PCM).
  • Production of internal reports, customer presentations, white papers, articles and application notes.
  • Production of website collaterals: infographics, block diagrams, video scripts.
  • Drive exhibition booth setup and related activities
  • Join MarCom and PR team activities.

Education Requirements/Preference

  • This position requires a BSEE/MSEE or related engineering major with minimum of 3 years of marketing experience in Semiconductor industry or IP licensing.
  • Experience on Technical Marketing across a variety of IoT applications from consumer electronics to enterprise.
  • Understanding on semiconductor industry, system architectures and memory market is highly desirable.
  • The candidate should demonstrate ability to comprehend and consider both technical and marketing information and possess excellent communication, presentation and interpersonal skills.
  • Excellent graphic design skills, expert in PowerPoint and Photoshop.
  • High-energy, self-motivated, self-directed, must have demonstrated ability to influence.
  • The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment.

Marketing Business Analyst

Location

  • Full time position in Santa Clara, CA

Job Description

As a Marketing Business Analyst at Crossbar, Inc., your responsibilities include, but are not limited to the following:

  • Collect and analyze market data across various memory-related applications: data centers, mobile, industrial / automotive / medical, consumer electronics, IoT, artificial intelligence.
  • Create and maintain market & business analysis reports and competitive positioning models vs other memory companies.
  • Extract valuable information from complex business models. Production of internal reports, customer presentations, white papers, articles and application notes.
  • Contribute to MarCom and PR team activities.

Education Requirements/Preference

  • This position requires a BSEE/MSEE or related engineering major with minimum of 3 years of marketing experience in Semiconductor industry or IP licensing.
  • Experience on Marketing across a variety of IoT applications from consumer electronics to enterprise.
  • Experience in semiconductor industry, system and memory market is mandatory.
  • The candidate should demonstrate ability to comprehend and consider both technical and marketing information and possess excellent communication, presentation and interpersonal skills.
  • Excellent synthesis skills, sharp analytical mindset, expert in Excel and PowerPoint.
  • High-energy, self-motivated, self-directed, must have demonstrated ability to influence.
  • The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment.

Mask Layout Engineering Contractor

Location

  • Contractor position in Santa Clara, CA

Responsibilities

  • Drawing layout of analog and mixed signal cells including DRC & LVS.
  • Perform schematic driven layout and design constraints.
  • Perform block or top level designs.
  • Perfrom floor-planning, power line planning, shielding, and device matching layout techniques.

Minimum Requirements

  • At least 2+ years of relevant mask design/layout experience.
  • Ability to independently draw and verify complex layouts using industry standard circuit design tools.
  • Experience using CAD/CAE tools such as Cadence, Synopsys, Mentor Graphiscs tools.
  • Attention to detail, organized, accurate and efficient layout techniques.
  • A good track record of on time work delivery.
  • A self-motivated, team player with good communication skills.
  • Analog layout experience in deep-submicron CMOS (40nm and below) is preferred.

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